[ Pobierz całość w formacie PDF ]
control function but it is an unused bit, dedicated by name line and RF converter outputs. The power mute mode is
to change the I2C-bus register content from the Power-on automatically activated via the Power-on reset function
reset state. during power-up of the supply voltage. During
power-down, the mute switches are activated
Bit POR of the read byte is a logic AND function for
automatically by means of the auto-mute circuit which is
checking all I2C-bus register bits. Bit POR will read logic 1
independent of the setting of bit MUTE. When setting
when the I2C-bus register content equals the Power-on
bit MUTE = 1 the output current on pins RFCOUT, LINEL,
reset default state and also when this state is set via the
LINER, DECL and DECR is limited to -1 mA for controlled
I2C-bus control. Since a setting of bit PORR = 1 differs
power-up response and the selected output signal is
from the Power-on reset default state, it forces a reset of
muted (see Section 6.6).
bit POR to logic 0 independent of other bit settings.
Table 33 Power mute (bit MUTE)
Table 31 Resetting of bit POR (bit PORR)
MUTE MODE DESCRIPTION
PORR MODE DESCRIPTION
0 no mute power muting released: mute
0 no reset note 1
switches are open
1 bit POR reset of bit POR (read byte)
1 mute power muting activated: mute
reset
switches are closed; note 1
Note
Note
1. Power-on reset state.
1. Power-on reset state.
1999 Apr 14 29
Philips Semiconductors Product specification
Audio processor with head amplifier for VHS hi-fi TDA9605H
7.9.7 STANDBY SELECT 7.10.1 CALIBRATION READY
The TDA9605H is switched in the low-power active The completion of calibration is signalled by changing
standby mode by setting bit STBA = 1. Most circuits are bit CALR from logic 0 to logic 1. Bit CALR remains logic 0
switched inactive for reducing power consumption. if for some reason a calibration can not be completed (i.e.
However, the RF converter, line and decoder outputs no HID control signal available or the hi-fi processing is in
remain active in this mode and the direct audio selections the playback mode). Bit CALR will also return to logic 0 if
offered via the line select function and the decoder select calibration is lost due to a Power-on reset situation.
function remain available. The selected output signal is
Additional information about the calibration result is
muted during the active standby mode.
available via bit CALE. Calibration is found correct if
The TDA9605H is switched in the minimum power passive bit CALR = 1 and bit CALE = 0.
standby mode by setting bit STBP = 1. All circuits are
Pin ENVOUT can also be used to monitor calibration
switched inactive to obtain minimum power consumption
(see Section 6.5).
except for the power mute circuit, the I2C-bus and the line
input reference buffer (i.e. the DC voltage on pins 1 to 11
Table 35 Calibration ready (bit CALR)
remains active). When bit STBP = 1 a discharge current of
1 mA is active on pins RFCOUT, LINEL, LINER, DECL
CALR DESCRIPTION
and DECR.
0 not calibrated; note 1
Power muting ensures disturbance-free switching of the
1 auto-calibration completed
line and RF converter outputs to and from the passive
standby mode. In the passive standby mode power muting Note
can be de-activated again to achieve minimum power
1. Power-on reset state.
consumption. The calibration and I2C-bus registers are not
affected in the active standby or passive standby mode.
7.10.2 AUTO-NORMAL SELECTION
The auto-normal function is activated when no hi-fi carrier
Table 34 Standby passive (bit STBP) and standby active
input signal is detected in the playback mode.
(bit STBA); note 1
The auto-normal function overrules the settings of the
STBP STBA MODE DESCRIPTION
output select function and selects normal sound (i.e. linear
audio) instead of hi-fi. The state of the auto-normal
0 0 operating standard operating mode:
function can be checked by reading bit AUTN.
full function; note 2
0 1 active active standby mode: The auto-normal function and therefore bit AUTN is only
standby reduced power valid in the playback mode. Bit AUTN is always logic 0 in
consumption the record mode.
1 X passive passive standby mode:
Table 36 Auto-normal (bit AUTN)
standby minimum power
consumption
AUTN DESCRIPTION
Notes
0 hi-fi carrier available; audio FM signal is
detected from tape in playback mode; note 1
1. X = don t care.
1 normal sound selected instead of hi-fi carrier;
2. Power-on reset state.
no audio FM signal is detected from tape
7.10 Read byte
Note
The read byte is used for reading the device state
1. Power-on reset state.
information.
1999 Apr 14 30
Philips Semiconductors Product specification
Audio processor with head amplifier for VHS hi-fi TDA9605H
Detecting the occurrence of a Power-on reset by reading
7.10.3 CALIBRATION ERROR
bit POR requires a setting of bit PORR = 1 after power-up.
An unreliable calibration result is indicated when reading
Bit POR is forced to logic 0 only by setting bit PORR = 1,
bit CALE = 1. The calibration result is not reliable when
so this setting is independent of other I2C-bus bit settings.
during calibration the control signal on pin RMHID is
After calibration a Power-on reset occurrence is also
disturbed due to an external cause. Such a disturbance of
indicated by bit CALR = 0, because calibration will be lost.
the HID control signal is detected when reading
bit CALE = 1. A new calibration should be started to
ensure proper calibration. Table 38 Power-on reset (bit POR)
Calibration is found correct when bit CALR = 1 and
POR DESCRIPTION
bit CALE = 0.
0 I2C-bus bit state differs from the Power-on reset
state
Table 37 Calibration error (bit CALE)
1 I2C-bus bit state equals the Power-on reset
CALE DESCRIPTION
state; note 1
0 not calibrated or calibration result is found
Note
correct; note 1
1. Power-on reset state.
1 calibration error encountered during calibration
Note
1. Power-on reset state.
7.10.4 POWER-ON RESET
An internal Power-on reset signal is generated at
power-up or during a power voltage dip. The I2C-bus data
bits and auto-calibration registers are reset to a [ Pobierz całość w formacie PDF ]
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control function but it is an unused bit, dedicated by name line and RF converter outputs. The power mute mode is
to change the I2C-bus register content from the Power-on automatically activated via the Power-on reset function
reset state. during power-up of the supply voltage. During
power-down, the mute switches are activated
Bit POR of the read byte is a logic AND function for
automatically by means of the auto-mute circuit which is
checking all I2C-bus register bits. Bit POR will read logic 1
independent of the setting of bit MUTE. When setting
when the I2C-bus register content equals the Power-on
bit MUTE = 1 the output current on pins RFCOUT, LINEL,
reset default state and also when this state is set via the
LINER, DECL and DECR is limited to -1 mA for controlled
I2C-bus control. Since a setting of bit PORR = 1 differs
power-up response and the selected output signal is
from the Power-on reset default state, it forces a reset of
muted (see Section 6.6).
bit POR to logic 0 independent of other bit settings.
Table 33 Power mute (bit MUTE)
Table 31 Resetting of bit POR (bit PORR)
MUTE MODE DESCRIPTION
PORR MODE DESCRIPTION
0 no mute power muting released: mute
0 no reset note 1
switches are open
1 bit POR reset of bit POR (read byte)
1 mute power muting activated: mute
reset
switches are closed; note 1
Note
Note
1. Power-on reset state.
1. Power-on reset state.
1999 Apr 14 29
Philips Semiconductors Product specification
Audio processor with head amplifier for VHS hi-fi TDA9605H
7.9.7 STANDBY SELECT 7.10.1 CALIBRATION READY
The TDA9605H is switched in the low-power active The completion of calibration is signalled by changing
standby mode by setting bit STBA = 1. Most circuits are bit CALR from logic 0 to logic 1. Bit CALR remains logic 0
switched inactive for reducing power consumption. if for some reason a calibration can not be completed (i.e.
However, the RF converter, line and decoder outputs no HID control signal available or the hi-fi processing is in
remain active in this mode and the direct audio selections the playback mode). Bit CALR will also return to logic 0 if
offered via the line select function and the decoder select calibration is lost due to a Power-on reset situation.
function remain available. The selected output signal is
Additional information about the calibration result is
muted during the active standby mode.
available via bit CALE. Calibration is found correct if
The TDA9605H is switched in the minimum power passive bit CALR = 1 and bit CALE = 0.
standby mode by setting bit STBP = 1. All circuits are
Pin ENVOUT can also be used to monitor calibration
switched inactive to obtain minimum power consumption
(see Section 6.5).
except for the power mute circuit, the I2C-bus and the line
input reference buffer (i.e. the DC voltage on pins 1 to 11
Table 35 Calibration ready (bit CALR)
remains active). When bit STBP = 1 a discharge current of
1 mA is active on pins RFCOUT, LINEL, LINER, DECL
CALR DESCRIPTION
and DECR.
0 not calibrated; note 1
Power muting ensures disturbance-free switching of the
1 auto-calibration completed
line and RF converter outputs to and from the passive
standby mode. In the passive standby mode power muting Note
can be de-activated again to achieve minimum power
1. Power-on reset state.
consumption. The calibration and I2C-bus registers are not
affected in the active standby or passive standby mode.
7.10.2 AUTO-NORMAL SELECTION
The auto-normal function is activated when no hi-fi carrier
Table 34 Standby passive (bit STBP) and standby active
input signal is detected in the playback mode.
(bit STBA); note 1
The auto-normal function overrules the settings of the
STBP STBA MODE DESCRIPTION
output select function and selects normal sound (i.e. linear
audio) instead of hi-fi. The state of the auto-normal
0 0 operating standard operating mode:
function can be checked by reading bit AUTN.
full function; note 2
0 1 active active standby mode: The auto-normal function and therefore bit AUTN is only
standby reduced power valid in the playback mode. Bit AUTN is always logic 0 in
consumption the record mode.
1 X passive passive standby mode:
Table 36 Auto-normal (bit AUTN)
standby minimum power
consumption
AUTN DESCRIPTION
Notes
0 hi-fi carrier available; audio FM signal is
detected from tape in playback mode; note 1
1. X = don t care.
1 normal sound selected instead of hi-fi carrier;
2. Power-on reset state.
no audio FM signal is detected from tape
7.10 Read byte
Note
The read byte is used for reading the device state
1. Power-on reset state.
information.
1999 Apr 14 30
Philips Semiconductors Product specification
Audio processor with head amplifier for VHS hi-fi TDA9605H
Detecting the occurrence of a Power-on reset by reading
7.10.3 CALIBRATION ERROR
bit POR requires a setting of bit PORR = 1 after power-up.
An unreliable calibration result is indicated when reading
Bit POR is forced to logic 0 only by setting bit PORR = 1,
bit CALE = 1. The calibration result is not reliable when
so this setting is independent of other I2C-bus bit settings.
during calibration the control signal on pin RMHID is
After calibration a Power-on reset occurrence is also
disturbed due to an external cause. Such a disturbance of
indicated by bit CALR = 0, because calibration will be lost.
the HID control signal is detected when reading
bit CALE = 1. A new calibration should be started to
ensure proper calibration. Table 38 Power-on reset (bit POR)
Calibration is found correct when bit CALR = 1 and
POR DESCRIPTION
bit CALE = 0.
0 I2C-bus bit state differs from the Power-on reset
state
Table 37 Calibration error (bit CALE)
1 I2C-bus bit state equals the Power-on reset
CALE DESCRIPTION
state; note 1
0 not calibrated or calibration result is found
Note
correct; note 1
1. Power-on reset state.
1 calibration error encountered during calibration
Note
1. Power-on reset state.
7.10.4 POWER-ON RESET
An internal Power-on reset signal is generated at
power-up or during a power voltage dip. The I2C-bus data
bits and auto-calibration registers are reset to a [ Pobierz całość w formacie PDF ]